cy27020 spread spectrum clock generator cypress semiconductor corporation ? 198 champion court ? san jose , ca 95134-1709 ? 408-943-2600 document #: 38-07273 rev. *e revised september 29, 2010 features supports clock requirements for printers 48-mhz spread spectrum clock output 48-mhz reference clock output two selectable spread percentages: ?1% and ?3% integrated loop filter 48-mhz crystal or external clock input 3.3-v supply operation (2.5-v functional) 8-pin small outline integrated circuit (soic) package functional description the cy27020 clock generator provides a low emi clock output for printers. it features spread spectrum technology, a modulation technique designed specifically for reducing emi at the fundamental frequency and its harmonics. table 1. frequency table xin sson# sssel refout clkout 48.00 mhz 0 0 48.00 mhz 48.00 mhz at ?1% 48.00 mhz 0 1 48.00 mhz 48.00 mhz at ?3% 48.00 mhz 1 0 48.00 mhz 48.00 mhz (no spread) 48.00 mhz 1 1 48.00 mhz 48.00 mhz (no spread) xin xout oscillator pll sscg sson# sssel refout clkout logic block diagram [+] feedback
cy27020 document #: 38-07273 rev. *e page 2 of 7 pin configuration figure 1. pin diagram ? cy27020 8-pin soic package spread spectrum clock generation (sscg) spread spectrum clock generation (sscg) is a frequency modulation technique used to reduce electromagnetic inter- ference radiation generated by re petitive digital signals, mainly clocks. a clock accumulates electromagnetic energy at its center frequency and its harmonics. spread spectrum distributes this energy over a small frequency band and decreases the peak value of radiated energy over the spectrum. this technique is achieved by modulating the clock around or below the center of its nominal frequency by a certain percentage (which also deter- mines the energy distribution band). the sscg function is enabled when sson# pin is asserted low, resulting in a spread bandwidth that is down spread by either ?1% or ?3%, selected by sssel (see table 1 on page 1). . note 1. pu = internal pull-up resistor, pd = internal pull-down resistor. pin description pin name i/o type [1] description 1clkout o fixed frequency 48.00 mhz spread spectrum clock output. see ta b l e 1 on page 1 for frequency selections 2 vdd pwr 3.3-v power supply 3 vss pwr ground 4xin i oscillator buffer input. connect to an extern al parallel resonant crystal (nominally 48.00 mhz) or externally generated 48 mhz reference clock. 5xout o oscillator buffer output. connect to an external parallel resonant crystal. do not connect when an externally generated reference clock is applied at xin. 6 sssel i pu spread spectrum perc entage select input. see ta b l e 1 on page 1 for details. 7 refout o ? buffered output of xin. 8 sson# i pd spread spectrum enable input. when asserted low, spread spectrum is enabled. 1 2 3 4 8 7 6 5 sson# refout sssel xout clkout vdd vss xin cy27020 figure 2. no spread vs down spread example [+] feedback
cy27020 document #: 38-07273 rev. *e page 3 of 7 absolute maximum conditions exceeding maximum ratings may shorten the useful life of the device. user guidelines are not tested. [2] minimum input voltage relative to v ss : ...............v ss ? 0.3 v maximum input volta ge relative to v dd : ............. v dd + 0.3 v storage temperature: ................................. ?65 c to 150 c operating temperature: ................................... 0 c to 70 c maximum electrostatic discharge (esd) protection: ...... 2 kv maximum power supply: ............................................... 5.5 v operating voltage: ..............................................2.5 v?3.6 v this device contains circuitry to protect the inputs against damage due to high static voltages or electric field; however, care should be taken to avoid application of any voltage higher than the maximum rated voltages to this circuit. for proper operation, the i/o pins should be constrained to the range: v ss < i/o < v dd unused inputs must always be tied to an appropriate logic voltage level (either v ss or v dd ). notes 2. multiple supplies: the voltage on any input or i/o pin cannot exceed the power pin during power-up. power supply sequencing is not required. 3. in applications where a crystal is used for the input reference clock, refer to the crystal manufacturer?s specifications for the required crystal load capacitor value. 4. parameters are guaranteed by design and characterization. not 10 0% tested in production. all parameters specified with fully loaded outputs. all outputs loaded with 15 pf. 5. measured between 0.1 x v dd and 0.9 x v dd volts. 6. triggering is done at 1.5 v. dc electrical specifications (v dd =3.3v 10%, t a = 0c to 70c) [3] parameter description conditions min typ max unit v il input low voltage sson#, sssel ? ? 0.8 v v ih input high voltage 2.2 ? ? v v thxin xin threshold voltage 0.3 v dd 0.5 v dd 0.7 v dd v i il1 input low current sson# = v ss ?5 0 5 a i ih1 input high current sson# = v dd 3820 a i il2 input low current ssel = v ss ?36 ?16.5 ?7.4 a i ih2 input high current ssel = v dd ?5 0 5 a i dd3.3v dynamic supply current no output load ? 20 25 ma v ol output low voltage i ol = 4.0 ma ? ? 0.4 v v oh output high voltage i oh = ?4.0 ma 2.4 ? ? v cin input capacitance pins 6 and 8 ? 3 5 pf cx xin, xout capacitance pins 4 and 5 ? 3 5 pf pu/pd pull-up/pull-down re sistance sson#, sssel 100 200 400 k ac electrical specifications (v dd =3.3v 10%, t a = 0c to 70c) parameter description conditions min typ max unit ifr input frequency range 44 48 52 mhz t r rise time [4,5] ?12 ns t f fall time [4,5] ?12 ns ss% spread spectrum percentage sson# = 0, sssel = 0 ? ?1 ? % sson# = 0, sssel = 1 ? ?3 ? % t pu power-up to stable output [6] all output clocks ? ? 3 ms t dc clock duty cycle [4,6] cl = 15 pf 45 50 55 % t ccj refout cycle-to-cycle jitter [4,6] cl = 15 pf ? ? 350 ps clkout cycle-to-cycle jitter [4,6] ? 100 250 ps [+] feedback
cy27020 document #: 38-07273 rev. *e page 4 of 7 figure 2. application schematic example [7,8] ordering code definitions ordering information part number package type production flow pb-free CY27020SXC 8-pin soic commercial, 0 c to 70 c CY27020SXCt 8-pin soic - tape and reel commercial, 0 c to 70 c notes 7. the circuit shows -1.0% spread. refer to ta b l e 1 on page 1 for details. 8. use the crystal manufacturer?s recommended values for cl1 and cl2 load capacitors. x in xout c l 2 c l 1 0.1uf 33 33 v d d refout clkout cy27020 1 7 5 4 sssel s s o n # 8 6 vss 3 2 vss vss 48 mhz vdd cy base part number 27020 company id: cy = cypress pb-free soic package sx t tape and reel c commercia temperature range [+] feedback
cy27020 document #: 38-07273 rev. *e page 5 of 7 package drawing and dimension figure 3. 8-pin (150-mil) soic 51-85066 *d [+] feedback
cy27020 document #: 38-07273 rev. *e page 6 of 7 acronyms document conventions table 2. acronyms used in this document acronym description clkout reference clock out emi electromagnetic interference esd electrostatic discharge oe output enable pd power down pll phase locked loop ppm parts per million ss spread spectrum ssc spread spectrum clock sscg spread spectrum clock generation sson spread spectrum on table 3. units of measure symbol unit of measure c degree celsius k kilo ohm a microamperes s microsecond ma milliamperes ms millisecond mw milliwatt mhz megahertz ns nanosecond ohm pf pico farad ps pico second vvolts wwatts [+] feedback
document #: 38-07273 rev. *e revise d september 29, 2010 page 7 of 7 all products and company names mentioned in this document may be the trademarks of their respective holders. cy27020 ? cypress semiconductor corporation, 2002-2010. the information contained herein is subject to change without notice. cypress s emiconductor corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a cypress product. nor does it convey or imply any license under patent or other rights. cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement wi th cypress. furthermore, cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. the inclusion of cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies cypress against all charges. any source code (software and/or firmware) is owned by cypress semiconductor corporation (cypress) and is protected by and subj ect to worldwide patent protection (united states and foreign), united states copyright laws and internatio nal treaty provisions. cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the cypress source code and derivative works for the sole purpose of creating custom software and or firmware in su pport of licensee product to be used only in conjunction with a cypress integrated circuit as specified in the applicable agreement. any reproduction, modification, translation, compilation, or repre sentation of this source code except as specified above is prohibited without the express written permission of cypress. disclaimer: cypress makes no warranty of any kind, express or implied, with regard to this material, including, but not limited to, the implied warranties of merchantability and fitness for a particular purpose. cypress reserves the right to make changes without further notice to t he materials described herein. cypress does not assume any liability arising out of the application or use of any product or circuit described herein. cypress does not authori ze its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. the inclusion of cypress? prod uct in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies cypress against all charges. use may be limited by and subject to the applicable cypress software license agreement. document history page sales, solutions, and legal information worldwide sales and design support cypress maintains a worldwide network of offices, solution center s, manufacturer?s representative s, and distributors. to find t he office closest to you, visit us at cypress.com/sales. products automotive cypress.co m/go/automotive clocks & buffers cypress.com/go/clocks interface cypress. com/go/interface lighting & power control cypress.com/go/powerpsoc cypress.com/go/plc memory cypress.com/go/memory optical & image sensing cypress.com/go/image psoc cypress.com/go/psoc touch sensing cyp ress.com/go/touch usb controllers cypress.com/go/usb wireless/rf cypress.com/go/wireless psoc solutions psoc.cypress.com/solutions psoc 1 | psoc 3 | psoc 5 document title: cy27020 spread spectrum clock generator document number: 38-07273 rev. ecn no. submission date orig. of change description of change ** 110661 02/19/02 xht new data sheet *a 122868 12/21/02 rbi add power up requirements to maximum rating information *b 279429 see ecn rgl added lead-free devices *c 2759365 09/02/2009 tsai updated template. post to external web. *d 2899304 03/25/2010 cxq removed inactive parts from ordering information updated package drawing and dimension . *e 3041840 09/29/2010 cxq removed ?ic? from end of document title. fixed various formatting and typographical errors. change all sson pin references to sson#. added row to table 1 for explicit select pin functional explanation. removed references to cera-lock input. removed redundant note 3. [+] feedback
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